1546565-1_Datasheet PDF

Set-top box form factors are often constrained by the use of CAN tuners. If a set-top box uses 2 or more tuners, a large percentage of its size is taken up by the CAN tuners. If you have noticed that your latest set-top box is much smaller than your previous set-top box, it probably uses silicon tuners.

1546565-1_Datasheet PDF

Figure 2: Side-by-side size comparison of CAN tuner and silicon tuner

Flat Panel TVs are also space constrained. Old CRT or rear projection TVs had ample room to fit CAN tuners, but flat-panel TVs have form factor considerations that make the small size of silicon tuners very desirable.

Cost is another long-term benefit of silicon tuners. In the past silicon tuners have found it difficult to compete on cost with discrete CAN tuners. Discrete CAN tuners have been in production for a long time. The development costs have been amortized over many years of production. The manufacturing costs have been continually reduced over the years to the point that they are reaching their asymptote. Manufacturers of discrete CAN tuners are still burdened by the cost of such things as hand tuning each part.

1546565-1_Datasheet PDF

Silicon tuners are greatly reducing their cost with each new generation. Silicon tuners can take advantage of reductions in their manufacturing processes. The first generations of silicon tuners used more expensive processes, such as Silicon Germanium (SiGe), to help overcome the technical difficulties previously described in this article. The costs of these processes have since dropped over time. Successive generations of tuners have been developed in even less expensive processes.

The next generation of tuners will be developed using a standard CMOS process. The move to CMOS also opens the possibility of integrating the tuner into the demodulator or SoC. This can also greatly reduce the cost of the system.

1546565-1_Datasheet PDF

Next: Programmability and stability

Programmability and stability Silicon tuners also have the advantage of programmability. This means that one tuner can be programmed to accommodate several different standards. For example, a front-end design intended for DVB-T reception can be reused for ATSC reception, or DVB-C reception. The DVB-T system may use an intermediate frequency (IF) of 36MHz with a channel bandwidth of 8MHz.

About the author Daniel Feldman is a Senior Product Line Manager at Microsemi's Analog and Mixed Signal Group. He is in charge of the P&L Management of all products in the Power over Ethernet, xDSL remote power feeding and Telephony Ring Generation markets, including ICs and modules. He is an active member of the IEEE 802.3at Task Force and Chairs the Ethernet Alliance PoE/PoEPlus Technical Committee.

Home video products have required design and verification of software-programmable hardware functions for several years. The latest generation of 65-nanometer systems-on-chip integrates tens of embedded CPUs, each one running several applications.

The need to integrate hardware and software better and earlier has been evident for a long time, but because of the increase in complexity, the firmware is becoming available later and later, making the problem worse. Too many integration issues are postponed until silicon is available.

In the past, software for the processors was always treated like a black box. Firmware engineers passed binary files and memory images to verification engineers to be run. Running firmware on a CPU has always violated a key verification premise: Whatever is to be verified must be controllable and observable. This lack of control normally results in a large library of tests to be run on the processor–tests that are difficult to sequence with the hardware interactions and that are also hard to maintain. Without observability, it is difficult to know whether the tests actually verified what they were designed to verify.

Improving the verification methodology requires a solution that exposes all the issues between hardware and software, and one capable of doing it even when not all the firmware is available. The first step toward achieving this goal is examining the architecture of the software. Some projects don't have a well-defined structure with interfaces between layers of software. To improve the methodology for home video projects, it is necessary to change the firmware design process and define a more formal hardware abstraction layer (HAL) to contain all the software that interfaces directly with the hardware. Once the HAL is documented and coded, verification can be done on top of this interface.


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