SFH 4796S_Datasheet PDF

Another one you might find worth of analyzing is that I think it *must* be taught in college, even for future application-level programmers, because it teaches so much about computer actual working. I read an interesting post about this in O'Really site back some months ago. It's pretty funny as well to read an entry in MSDN about 'tips to improve performance in VB apps'; one realizes the big mistake of teaching OOP without any previous structured programming exposure (or lower level one!).

For the rest of it my opinion is standard (in the fans' side), I guess. On one side, I think assembly gained a bad reputation it does not deserve at all; it's great for what it's great, and is not good to access huge enterprise DB, as an example. However, in several projects I have experienced myself the 'avoid-assembly-at-any-price' disease, and it is as absurd as it gets. Low-level, architecture-tailored C shares with assembly most of its weaknesses, and some tasks are much better accomplished coding in assembly than in C. Special mention to the obsession to code in C for lowest level, 1KB RAM µC families (funniest in earth, in tight competition with highest grade DSP).

SFH 4796S_Datasheet PDF

Editor's Note: This reader makes some very interesting points, especially when he says: . . . the big mistake of teaching OOP without any previous structured programming exposure (or lower level one!).”

I know just what he means. I'm not a programmer in any respect, but I dabble in C whenever I need to do something; for example, I once threw a simple program together to determine all the different possible tap combinations that would achieve maximal-displacement linear feedback shift registers (LFSRs) for registers from 2 to 32 bits in length.

SFH 4796S_Datasheet PDF

Twenty-five years ago I could go to any C programmer (no matter how junior) wherever I was working at the time and say something like: how do I pass an array of pointers into a function?” . . . they would immediately sketch the code on a whiteboard.

More recently, if I've asked this sort of question, I've found these folks reaching for their C programming book, because they are so used to using higher level programming interfaces (like Visual C or Visual BASIC, for example). The problem is that if you don't have an understanding as to what's going on under the hood,” your code is going to be awful. I could tell you some stories. . .

SFH 4796S_Datasheet PDF

We're using assembly to test our new 8-bit microprocessor. (It's a long story but we have a proprietary micro with reams of legacy code, so we're beefing it up and modernizing a bit while reducing cost.)

We have a C compiler, but it brings a lot of unneeded and unwanted overhead. I'd certainly love the productivity boost of an ANSI C compiler, but the one we have ain't it. Besides, assembly gets us closer to bare metal, which we are testing, so we'd have to go there at some point anyway.

Cost is another key reason for the extensive prototype use we see today. FPGA-based prototypes are not only affordable; they easily are deployable and can be distributed widely to various members of a software development team. And, with state-of-the-art SoCs, it's not unusual to have a team of 100 to 200 software developers involved worldwide. Thus, the software development team, regardless of location, can be up and running months earlier than is practical with other approaches, shortening development times, further reducing costs.

Finally, FPGA-based prototypes improve RTL quality as well. Integrating software with hardware is an arduous process, normally done after the hardware design has been thoroughly tested and is deemed free of bugs. Yet, inevitably, even after extensive verification, a few hard-to-find bugs are revealed late in the game when software and hardware come together. These final hardware bugs, buried deep in the system, are not easy to detect with slow verification methods because they are only revealed with extremely long and time-consuming test sequences. The superior speed of FPGA prototypes shortens the test sequence time, and provides another advantage to this approach. Until recently, analyzing bugs in a running prototype was quite difficult. However, Synplicity's new TotalRecall full-visibility technology substantially simplifies analysis by automatically capturing test benches for hard-to-find bugs so they can be replayed in a simulator.

Even with all the benefits offered by FPGA prototyping, there still remain many ways to improve the user experience. Verification with FPGA prototypes must be cleanly integrated with other methods of verification. Synplicity has taken the first step in this direction by integrating prototype debug with RTL simulation through its TotalRecall technology. Other opportunities for integration exist. For example, Synplicity and Synopsys recently announced a joint marketing agreement to create next-generation hardware-assisted verification flows. By working together, we expect to be able to deliver solutions that increase productivity for FPGA-based prototyping of ASIC designs. In addition, much can be done to make prototypes faster to develop and easier to change and modify. Accomplishing this task requires the availability of more complete solutions. Until now, design teams interested in ASIC prototyping had to buy products from a variety of vendors and integrate them. Synplicity has taken an important step to solve this problem through its acquisition of HARDI Electronics AB. HARDI's HAPS (High-performance ASIC Prototyping System) solutions offer off-the-shelf prototyping hardware with the latest FPGA technology that is flexible, extensible and reusable. By combining software and hardware in a single solution, Synplicity will be able to improve the prototyping experience by offering easier-to-use, easier-to-bring-up solutions.

The ultimate goal is to create an environment where designers can get to work quickly, debug rapidly and make changes without delay. With the advent of integrated prototyping systems, prototyping will assume a key position along side other verification methodologies. The ability to run at speed,” i.e. running tests as fast as the hardware will go, will be an indispensable part of the verification of software-intensive SoCs. Only then will designers be well equipped to deal with the emerging challenges associated with increasing device and software complexity.

About the Author: Andrew Haynes is Vice President of Marketing for Synplicity.

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